The CDC 160 and CDC 160-A were 12-bit minicomputers built by Control Data Corporation from 1960 to 1965. The 160 was designed by Seymour Cray - reportedly over a long three-day weekend. It fit into the desk where its operator sat.
The 160 architecture used ones' complement arithmetic with end-around carry.[1]
NCR joint-marketed the 160-A under its own name for several years in the 1960s.
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The CDC 160A was a simple piece of hardware, and yet provided a variety of features which were scaled-down capabilities only found on larger systems. It was therefore an ideal platform for introducing neophyte programmers to the sophisticated concepts of low-level IO and interrupt systems.
All One-Sixty systems had a paper-tape reader, and a punch, and most had a flexo (type) writer. Memory on the 160 was 4096 12-bit words. The instruction set was small and RISC-like. The CPU had a 12-bit ones' complement accumulator but no multiply or divide. There was a full complement of instructions and several addressing modes. Indirect addressing was almost as good as index registers. Code was naturally position-independent, as all jumps were PC-relative. The original instruction set did not have a subroutine call instruction and could only address one bank of memory.
In the -A model, a "return jump" and a memory bank-switch instruction was added. Return-jump allowed simple subroutine calls and bank-switching allowed other 4K banks of memory to be addressed, albeit clumsily. The extra memory was expensive and had to live in a separate box as large as the 160 itself. The -A model could also accept a multiply-divide unit, which was another large and expensive peripheral box.
Low-level IO allowed control of devices, interfacing for determining device status, and for reading and writing data as either single bytes, or as blocks. IO could be completed to a register, or to memory, or via a direct-memory-access (DMA) channel. The distinction between these IO types was that regular IO would 'hang' the CPU until the IO operation completed, but DMA IO allowed the CPU to proceed with instruction execution concurrently with the data transfer. The interrupt system was purely based on IO, meaning that all interrupts were generated externally. Interrupts were introduced to neophytes as being the alert mechanism by which a program could be informed that a previously initiated DMA IO operation was completed.
The 160 architecture was modified to become the basis of the peripheral processors (PPs) in the CDC 6000 series mainframe computers. Large parts of the 160 instruction set were unchanged in the peripheral processors. However there were changes to incorporate the 6000 data channel programming, and control of the central processor. In the early days of the 6000s, almost the entire operating system ran in the PPs. This left the central processor unemcumbered by operating system demands and available for user programs.